• Design/implement various state-of-the-art, high-speed (32+Gbps) analog/mixed-signal blocks for SerDes PHYs • Deliver detailed specifications & documentation • Develop initial circuit schematics and work closely with layout designers to drive designs to completion (including physical verification and backend/reliability flows) • Drive design and layout reviews to ensure quality of deliverables and mitigate overall risk • Work closely with various disciplines (e.g. Layout, Logical Design, Physical Design, Firmware, and Design Verification) to ensure successful cross-team engagement and high-quality execution • Strong/effective communication skills • Enthusiastic team-first mentality • Experience with Unix/Linux environments • BS + -6 years, MS + -4 years, or PhD + -1-2 years with relevant experience in electrical engineering and/or computer architecture